An electrically erasable and writable flash memory cell has on its channel region a floating gate and a control gate which are separated by an insulation film, and it operates to shift up the threshold voltage of the memory cell by injecting hot electrons to the floating gate, and to shift down the threshold voltage by discharging injected electrons in the form of a tunnel current through the gate insulation film. For the write operation based on the injection of hot electrons and the erase operation based on the tunnel discharge of electrons, it is necessary to apply high voltages to the word lines, bit lines, source lines, and substrate. Switching of memory cells to be written or erased requires switching of word lines and source lines having high voltage application.
Publications which describe such flash memories include, for example, Japanese Patent Unexamined Publications No.Hei 11(1999)-232886 and No. Hei 11(1999)-345494.
High voltage driving of word lines and source lines is implemented by use of driver circuits which derive operational power from high-voltage power. The word lines and source lines are each provided with a driver circuit, which is formed of a CMOS inverter, etc. In case the high voltage used for writing or erasing is higher than the minimum breakdown voltage (BVds_min) between the source and drain of MOS transistors which form the driver circuit, if the driver circuit has its switching state reversed in the presence of high voltage application, the MOS transistors will break down, causing the driver circuit to become inoperative. On this account, it has been necessary conventionally to lower the operational power voltages of the driver circuits and associated switching signal level shift circuits below the minimum breakdown voltage (BVds_min) at the switching of word lines or source lines which undergo high voltage driving. For example, at every writing of a word line, the high voltage supply node and word line are discharged, word lines are switched, and the voltage of the high voltage supply node and word line is stepped up again. Voltage step-up circuits which produce high voltages used for writing are formed of charge pump circuits, etc., and the frequent repetition of voltage step-up and discharge of the high voltage supply nodes, which is accompanied by the charging and discharging of voltage smoothing capacitors having a large capacitance, cause a significant waste of power and time expenditure for charging and discharging, resulting in a slow write operation.
It is an object of the present invention to provide a semiconductor integrated circuit, such as a semiconductor non-volatile memory or microcomputer, which is immune to breakdown at the event of switching of the high voltage output state of the high voltage output driver in the presence of a high voltage power supply.
Another object of the present invention is to provide a semiconductor integrated circuit, such as a semiconductor non-volatile memory or a microcomputer having on-chip provision of this memory, which is capable of shortening the rewriting time.
Still another object of the present invention is to alleviate, by means of a relatively simple circuit arrangement, the occurrence of breakdown of MOS transistors which form a circuit for converting input signal levels into high voltage signal levels.
The foregoing and other objects and novel features of the present invention will become apparent from the following description and attached drawings.